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A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation

Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Jean-Luc Danger #1, Takafumi Aoki
#1 Laboratoire Traitement et Communication de l'Information [Paris] (LTCI)
  • Télécom ParisTech
  • CNRS : UMR5141
References
IEEE transactions on VLSI systems, August 2015,
Abstract
Keywords
Category
Article in peer reviewed Journal
Research Area(s)
Engineering Sciences/Electronics
Identifier(s)
DOI 10.1109/TVLSI.2014.2339892
Bibliographic key SE:IEEEVLSI-15
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Last update
on october 02, 2015


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