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Efficient Data-Flow Analysis of UML/SysML Diagrams for Optimized Model Compilation of Hardware-Software Systems

Andrea Enrici, Ludovic Apvrille, Renaud Pacalet

References

7th International Conference on Model-Driven Engineering and Software Development (MODELSWARDS), Prague, Czech Republic, February 2019,

Abstract

Growing needs in terms of latency, throughput and flexibility are driving the architectures of tomorrow's Radio
Access Networks towards more centralized configurations that rely on cloud-computing paradigms. In these new
architectures, digital signals are processed on a large variety of hardware units (e.g., CPUs, Field Programmable
Gate Arrays, Graphical Processing Units). Optimizing model compilers that target these architectures must rely on
efficient analysis techniques to optimally generate software for signal-processing applications.
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In this paper, we present a blocking combination of the iterative and worklist algorithms to perform static
data-flow analysis on functional views denoted with UML Activity and SysML Block diagrams. We demonstrate the
effectiveness of the blocking mechanism with reaching definition analysis of UML/SysML models for a 5G channel decoder
(receiver side) and a Software Defined Radio system. We show that significant reductions in the number of
unnecessary visits of the models' control-flow graphs are achieved, with respect to a non-blocking combination of
the iterative and worklist algorithms.

Keywords

Compilation, model-based engineering, UML, SysML

Category

Paper in proceedings

Research Area(s)

Computer Science/Computation and Language
Computer Science/Software Engineering
Computer Science/Computer Aided Engineering
Computer Science/Programming Languages
Computer Science/Logic in Computer Science
Computer Science/Modeling and Simulation
Computer Science/Networking and Internet Architecture

Identifier(s)

Bibliographic key AE-MOD-19

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Last update

on february 21, 2019 by Ludovic Apvrille